FAA/NTSB flight control software cover-up remediation
FAA FOIA lsawsuit - District of Columbia avoidable.

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Start Tuesday October 28 07:23 https://prosefights2.org/irp2023/windscammers29.htm.

Directory switch 11/08/25 https://www.prosefights2.org/irp2026/windscammers29.htm.

7/27/24 Conduct unbecoming navy officer Admiral William H Payne Complaint. 7/19/24 EyeglassWorld reading glasses and and optometrist exam issues. Unable to update above page. Updated page below. https://prosefights2.org/irp2023/mvdnow4.htm 1/24/24. Kaneohe Poseiden P8A FOIA. Vinson F-35C FOIA. 1/10/24. liaison 1. communication or cooperation which facilitates a close working relationship between people or organizations. 1/8/24. FOIA.GOV. Department of Defense Department of the Navy 202-685-0412 usn.ncr.dns.mbx.don-foia-pa@us.navy.mil Chief of Naval Operations, DNS-36 2000 Navy Pentagon Washington, DC 20350-2000 usn.ncr.dns.mbx.don-foia-pa@us.navy.mil 12/2/23. policy. a course or principle of action adopted or proposed by a government, party, business, or individual. 11/25/23. bamboozle fool or cheat (someone). 11/11/23. certification the action or process of providing someone or something with an official document attesting to a status or level of achievement. 11/10/23. retaliation the action of harming someone because they have harmed oneself; revenge. 11/9/23. nemesis the inescapable agent of someone's or something's downfall. 11/7/23. con persuade (someone) to do or believe something, typically by use of a deception. 10/31/23 conned persuade (someone) to do or believe something, typically by use of a deception. 7/5/23 Reprimand: "a rebuke, especially an official one. 3/22/23. Phone numbers issues. 1-855-658-2676. 1-888-127-6445478. Recording 2, 3, 4, 5, 6, 7, 8, 9. 3/21/23. Phone message from US government?. Two forms of id? 3/20/23 Feb 27, 2023. 4:41?PM (2 days ago) to me, DONFOIAPublicLiaison@navy.mil Good evening, Mr. Payne, Per our phone conversation, I recommend that you consider the following as points of contact possibly relevant to your concern of ensuring the safety of the avionics of the F-35: 1. The U.S Naval Safety Command, which conducts investigations of naval aviation mishaps. Quarterdeck: 757-444-3520. To report a mishap (or in this case, possibly, a potential mishap), Staff Duty Officer: 757-444-3520v ext. 7017. 2. The U.S. Fleet Cyber Command/ U.S. Tenth Fleet, 9800 Savage Road, Suite 6586, Fort Mead, Md 20755. To send them a message, go to https://www.fcc.navy.mil/Contact-Us/ As to making a request of the Department of the Navy under the Freedom of Information Act (FOIA), the main way to do so is to use FOIAonline. This is a website that you can find simply by searching the internet for the term “FOIAonline” (the correct site should appear as the top hit, and it will contain “foiaonline.gov” as part of the URL). FOIAonline is intended to be easy to use by the public; nevertheless, if you have any further questions or concerns, do not hesitate to let me know. Regards, Christopher Julka Freedom of Information Act Policy Coordinator & Public Liaison Department of the Navy Office of the Chief Information Officer Christopher.a.julka.civ@us.navy.mil (703) 697-0031 From: william payne Sent: Monday, February 27, 2023 1:12 PM To: DONFOIAPublicLiaison@navy.mil Subject: [URL Verdict: Unknown][Non-DoD Source] bill payne alternate email address Hello Mr Julka, Alternate email address. Sunday February 26, 2023 19:07 Module sizes, updates, costs? Department of the Navy Christopher Julka 2/24/23 phone message. 3/1/23 F-18 Carrier break and landing!. 12/25/22 , 12/21/22. The statute of limitations for a FOIA claim is six years. However, a requester may refile their FOIA request to restart the statute of limitations.Feb 21, 2017 11/24/22. Airbus A220 autopilot warning. Full coverage. FAA wants pilots to be less dependent on computer autopilots. 9/18/22 4/3/22 prosefights hacked. Again. :( 6000 lines of code vs 100 60 lines of code missing. Hacking attempted recovery 4.6.22. 2/5/22. __________________ 5/01/22. Linus Torvalds reveals the 'true' anniversary of Linux code. 9/21/21. US Navy software FOIA request. 9/3/21. Christopher Julka (703)-697-0031 DONFOIAPublicLiaison@navy.mil. 8/24/21. c/c++ wind turbine software use too? NTSB 8/20/21 phone message. Tweet. 4/22/21. No appeal possted yet. "( 4/21/21. Software tehnology? c/c++? Scary USS Gerald R. Ford - How Powerful is the CVN-78? US Navy's $13 Billion Aircraft Carrier. 4/20/21. Speed display disappear? Software issue? "(where's) my speed my speed" 4/18/21. Transcript. 4/17/21. Where is air speed? 4/1921. Rapid Descent and Crash into Water Atlas Air Inc. Flight 3591 Boeing 767-375BCF, N1217A. 4/16/21. NTSB Ms Tamara Crawford phone conversation 4/16. We are Legion. We do not forgive. We do not forget. Expect us. 4/1421. 4/13/21. 'view' oly appeared starting today? 4/12/21. What computers? How many modules? Lines of code for each module? Tamara Crawford audio 4/9/21. 4/11/21 https://data.ntsb.gov/Docket?ProjectID=99013 4/19/21. Poster attended book signing at Page One i Albuquerque. Sunday, January 07, 2001 5:52 PM Dear Friend, we saw some of these documents http://www.geocities.com/CapitolHill/Congress/8327/buehlerpayne.html but we would like your commentary about what happened and all circumstances so we can post it on our website but as well as a report to the mailing lists. With thanks On behalf of SMCCDI A. Zoubin ( Information Committee) http://www.iran-daneshjoo.org/ Wednesday, January 17, 2001 7:10 PM Dear Friend, A stand for Ahmad but why this question? Iran Danesjoo Information Committee project reports. [1, 2 , 3]. Swiss Radio International link fixed with irp2014 switch from malwarebytes. Tape traveled from Zurich to Baltimore Sun and Lassez Faire City Times ... with intermediate stop. Admiral fornmer Navy Seal. Another request? 4/10/21. Phone message attachment. 3/23/21. LIGHTWEIGHT OS FOR ANY PLATFORM. 3/20/21. 3/22/21 Attachments. 1 1 1 1 2/4/21. 12/30/20. R44jPT22f3d 12/25/20. 12/22/20. :( !!! J210*9t765r^ 12/22/20. :( !! J210*9t765r^ 12/21/20. :( ! 12/17/20. :( 12/16/20. Something wrong? 12/15/10 12/14/20. 12/10/20. 12/8/20. Tuesday December 8, 2020 14:43 http://www.prosefights.org/irp2020/windscammers13.htm#ntsbbryson Hello Ms. Bryson, This is an appeal of FOIA No. FOIA-2020-00406 denial. Ms. Melba Moye wrote on September 14, 2020 appears inapplicable for denial because FOIA requested DATA Final 3 minutes of Atlas Air #3591 Boeing 767: 1 Names of all software modules executed. 2 Time of execution. Nanosecond accuracy, if possible. 3 Altitude of #3591 at time software module entered. from NTSB chairman Sumwalt, Friday June 12, 2020 10:32. Ms. Moye's denial reason is unsupported. Ms. Moye/Ms. Joy Gordon make legal attempt to deny my FOIA These legal arguments should be addressed to a judge/jury in event I am unable to receive requested documents by administrative means? Since no legitimate reason for denial provided by Ms. Moye and Ms. Gordon exist, I ask that you grant appeal. And have NTSB deliver requested documents. Regards, william harris payne. 12/9/20. ____ https://dms.ntsb.gov/pubdms/. https://www.ntsb.gov/_layouts/ntsb.aviation/index.aspx. NTSB AttN: Ms Sharon Bryson Manager Director 490 L'Enfant Plaza SW Washington, D.C. 20594 Chaff? 10/26/20 FAA FOIA lawsuit - District of Columbia.. Boeing 787: A Financial Engineering Nightmare?. 10/6/20. ____ Boeing 737 MAX: Turning A Crisis Into A Win. Programming languages: Java founder James Gosling reveals more on Java and Android. 10/5/20. Liberal arts 'educated'? https://forums.linuxmint.com/viewtopic.php?t=294209 Linux 5 day course in focus because of 737 MAX and Raspberry Pi 4B.10/4/20 Programming languages: Java founder James Gosling reveals more on Java and Android. Back again after deletion. "Back in the early 1990s it was well understood that the number one source of security vulnerabilities was just pointers, was just bugs, like 50% to 60% to 70% were bugs and the vast majority of them were like buffer overflows. Liam Tung. why java michael barr. 10/1/20. At that stage, C an C++"absolutely owned the universe" and everything was being written in those languages. The statistics in this article have been a part of software engineering for decades. Back in 1990, they were a major pain point, and a major motivator behind many of the features of Java. James Gosling. 9/18/20. Unable to shrink email. :( ++ 9/14/20 9/11/20 ntsb foia status message. 8 rings. 8/11/20. Boeing 747s still get critical updates via floppy disks. Which OSs support floppies? ____ This surprise Linux malware warning shows that hackers are changing their targets. 8/10/20. FAA Dave Duff phone message 1 2. 8/01/20. A declaratory judgment is a binding judgment from a court defining the legal relationship between parties and their rights in a matter before the court. Typically, a party will first send a cease and desist letter prior to seeking declaratory judgment from a court. Injunctive relief, also known as an injunction, is a remedy which restrains a party from doing certain acts or requires a party to act in a certain way. It is generally only available when there is no other remedy at law and irreparable harm will result if the relief is not granted. 8/7/20. Where is Mark House? 206-231-2046 call audio. *                       UNITED STATES DISTRICT COURT

Thursday April 25, 2019 15:38
Updated
Friday May 31, 2019 16:45
3/7/23

New Mexico
Energy, Minerals & Natural Resources Department
nformation request

Saturiday November 8 07:58 \\16 Directory switch 11/08/25 https://www.prosefights2.org/irp2026/windscammers29.htm.

Try 1.

Friday November 7 17:58  ____ Solar-powered PV PI HAT delivers continuous off-grid operation for Raspberry Pi projects. Solar-powered PV PI HAT delivers continuous off-grid operation for Raspberry Pi projects ____ Amazon takes low-cost e-commerce service global. LLMs Add Safety Risks To Physical AI. whiich bif tecompanies use low-level virtual machine [llvm] technology? AI Overview Major companies that use LLVM technology include Apple, Google, NVIDIA, Qualcomm, and Intel. These companies leverage the LLVM compiler infrastructure for various products and development tools, such as Apple's macOS and iOS, NVIDIA's CUDA compiler, and Intel's C++ compiler. Other companies like AMD and Sony also use LLVM for their own products, like Sony's PlayStation 4 SDK and AMD's C/C++ compiler. ____ Hundreds of thousands of tech workers are in trouble, new report shows. You should write an agent (fly.io). Sam Altman says OpenAI has $20B ARR and about $1.4 trillion in data center commitments. Rideshare giant moves 200 Macs out of the cloud, saves $2.4 million. ____ x86 adc and rcl instructions cause what performance decrement compared to x86 processors? AI Overview On modern x86 processors, the performance decrement associated with the ADC and RCL i nstructions is primarily due to the serial dependency chain they create through the single, shared Carry Flag (CF), which limits the CPU's ability to use out-of-order execution. This makes them less efficient for large, parallelizable operations compared to other methods. ADC (Add with Carry) ... RCL (Rotate through Carry Left) ... In summary, the performance "decrement" is relative to the potential parallelism of modern x86 processors. While the instructions themselves may have a low latency, the dependency on a single, shared flag forces serial execution, which can be a bottleneck in code that could otherwise run in parallel. where can i find a working example of RCL (Rotate through Carry Left) for a risc-v platforms witten in gcc c with disassembly? AI Overview The RISC-V instruction set does not have a single, dedicated instruction for "rotate through carry" (RCL) like some other architectures (e.g., x86). The carry flag is not an implicitly accessed part of the general instruction set in the same way. The operation must be implemented i n C using standard bitwise operations, and the compiler will generate the necessary sequence of RISC-V instructions. Here is a C function that implements a single-byte (8-bit) rotate through carry left, along with the expected RISC-V assembly output (using GCC and a typical RV32I or RV64I target). C Code Implementation ... GCC C with Disassembly Example

____ Plug-In Solar Power Could Be Coming to a Balcony Near You. Blade breaks off wind turbine, falls into Mass. Try 1.

Thursday November 6 19:11 ____ What the last gas boom (and bust) says about today’s rush to build. Microsoft's $392 Billion Cloud Backlog Could Be a Hidden Goldmine. What should countries do with their nuclear waste?. Challenger job-cut report sparks selloff amid absence of government data. How Energy Providers Can Capitalize on Data Center Growth. ____ AI Overview To find a working RISC-V simple C program using the GCC C compiler with disassembly, follow these steps: Install the RISC-V GNU Toolchain. This toolchain includes the GCC compiler for RISC-V, objdump for disassembly, and other essential tools. You can either compile it from source or use pre-built binaries if available for your operating system."" Ciode: ____ Amazon down for thousands of users in the US. _ Countdown To Pi 1 Loss Of Support, Activated. Why is Software Support Such a Big Issue in the Computer Industries? Software support is a critical issue in the computer industry due to its direct impact on business operations and customer trust. Neglecting software support can lead to operational failures, operational disruptions, and financial losses. For instance, British Airways experienced a major computer system failure due to inadequate maintenance, which resulted in system downtime and financial penalties. Similarly, the WannaCry ransomware attack highlighted the importance of regular software updates and security patches to prevent cyberattacks. Inconsistent IT support can also lead to major IT failures, security risks, and lost productivity. Therefore, prioritizing software support is essential for maintaining a secure and competitive environment in the digital age. ____ where can i find a working example of single byte add with carry for a risc-v processor written in high-level c using the gcc compiler? AI Overview A direct single-byte add-with-carry instruction is not explicitly present in the base RISC-V instruction set architecture (ISA). Unlike some other architectures, RISC-V handles carry flags more implicitly through the use of specific instructions and careful programming. However, you can achieve the equivalent functionality of a single-byte add with carry in high-level C using the GCC compiler for RISC-V by simulating the carry behavior. Here is a working example: Explanation: add_with_carry function: This function takes two 8-bit unsigned integers (a, b) and a pointer to an 8-bit unsigned i nteger (carry_inout) which serves as both the input carry and the output carry. uint16_t sum = (uint16_t)a + b + *carry_inout;: The addition is performed using uint16_t to ensure that any carry generated during the sum of a, b, and the carry_inout is captured. return (uint8_t)sum;: The function returns the lower 8 bits of the sum, effectively giving the result of the single-byte addition. This approach effectively simulates the behavior of an "add with carry" operation in C, which GCC will then compile into the appropriate RISC-V instructions (likely involving standard add instructions and conditional branches to manage the carry). ____ Will quantum be bigger than AI?. Meta is earning a fortune on a deluge of fraudulent ads, documents show. Microsoft CEO drops blunt truth on AI. The Big Short Guy Just Bet $1 Billion That the AI Bubble Pops. The 5 FREE Must-Read Books for Every LLM Engineer. IBM’s CEO admits Gen Z’s hiring nightmare is real—but after promising to hire more. grads, he’s laying off thousands of workers. Anxious about AI job cuts? How white-collar workers can protect themselves - starting now. US layoffs for October surge to two-decade high, Challenger data shows. ____ Azure stumbles in Western Europe, Microsoft blames 'thermal event'Azure stumbles in Western Europe, Microsoft blames 'thermal event.'

____ Why this little-known metric will decide the value of future energy resources. LNG Freight Rates Surge By 50% As Europe Races To Refill Inventories. .Try 3,

++

Wednesday November 5 07:28 ____ does the x8r RCL do a keft shift with carry rotated into he lsb position and mub into a carry? AI Overview Yes, the x86 RCL (Rotate through Carry Left) instruction works exactly as described: It performs a left shift of all bits in the destination operand. The previous value of the Carry Flag (CF) is rotated into the least significant bit (LSB) position of the destination operand. The most significant bit (MSB) of the original operand is moved into the Carry Flag (CF). This mechanism allows for multi-word shifts and rotations by using the Carry Flag as an extension of the data being manipulated. does the risc-v have an instruction which does the same thing as an x86 instruction? AI Overview No, a single RISC-V instruction does not do the same thing as a single x86 instruction because the architectures are fundamentally different: x86 uses a Complex Instruction Set Computing (CISC) design with many complex, multi-byte instructions, while RISC-V uses a Reduced Instruction Set Computing (RISC) design with simple, fixed-length instructions. An x86 instruction that performs a complex operation (like loading, operating, and storing) would be broken down into several simpler, separate RISC-V instructions (load, compute, and store). CISC (x86): One x86 instruction can perform a complex operation, such as loading a value from memory, adding it to a register, and storing the result back in memory. RISC (RISC-V): A similar task on a RISC-V processor would require multiple simple instructions. For example, one instruction would load the value from memory, another would perform the addition, and a third would store the result. Efficiency: While this means more instructions are needed, the RISC-V instructions are simpler, faster, and can be overlapped and pipelined by the processor more efficiently, according to Quora. do ai reponses fvor cisc orver risc? AI Overview Cisco heavily uses AI in its products and solutions, but this is primarily built on x86 and ARM architectures, not RISC-V. Cisco does not currently offer AI-specific products or general AI responses "over" RISC-V architecture in any major capacity. Cisco's AI Strategy and Architecture RISC-V's Role: ... In summary, Cisco is a major player in AI-driven networking and security, but its hardware architecture for these solutions is primarily based on x86 and ARM, not RISC-V. ____ Word Raspian reason for putchse, :) ____ IBM to cut thousands of jobs in fourth quarter amid software focus. ibm 8,00 laid-off employees located in which countries? AI Overview IBM's recent job cuts, often cited around the figure of 8,000 roles, are part of a global "workforce rebalancing" strategy with major impacts in the United States and a significant shift of roles towards India and other South-East Asian countries. Key locations and details regarding the layoffs: United States: A substantial number of the job cuts have occurred in the U.S., including specific locations like Raleigh, North Carolina; New York; Dallas, Texas; and California. Reports have suggested that " as many as 9,000 U.S. jobs could be cut or offshored as part of the restructuring. India and Southeast Asia: The layoffs are closely tied to a strategic move to relocate jobs to countries with lower labor costs, such as India and the Philippines, where the company is actively hiring. Europe (in the past): A separate round of layoffs in late 2020 targeted around 8,000 staff in Europe, with significant numbers in the UK, Ireland, Germany, France, Italy, Denmark, Finland, Norway, and Sweden. Russia: IBM also wound down its business in Russia and laid off several hundred employees due to the war in Ukraine and escalating sanctions. The recent 8,000 job cuts are largely focused on back-office functions, particularly Human Resources (HR), with the company leveraging AI and automation in these areas. Despite the cuts in some divisions, IBM has emphasized that it is hiring in higher-growth areas like software development, consulting, and AI services, and that overall U.S. employment is expected to remain largely unchanged year-over-year. does ibm use llvm as its primary ai tool? AI Overview No, IBM does not use LLVM as its primary AI tool. IBM's primary AI platform is called watsonx, a comprehensive portfolio of AI products designed for enterprise-scale AI development and deployment. IBM does, however, incorporate LLVM into its compiler strategy. IBM's Use of LLVM ... In summary, LLVM is a foundational compiler technology that helps optimize software performance on IBM hardware, including for AI workloads, but the primary AI development and deployment platform offered by IBM is watsonx. AMD Contributes BFloat16 Support To LLVM's SPIR-V Target. ____ I took all my projects off the cloud, saving thousands of dollars (rameerez.com).

____ How nuclear waste could fuel a clean energy revolution. Try 1.

Tuesday November 4 14:30 ____ where is there a working example of a single byte add with carry risc-v emulation using the clang c compiler? AI Overview RISC-V's base instruction set does not include a dedicated "add with carry" (ADC) instruction like some other architectures (e.g., ARM). Multi-word addition with carry in RISC-V is typically implemented by performing a standard ADD and then checking for an overflow to determine the carry, which is then added to the next higher word. While there isn't a single, universally recognized "working example" of a single-byte add with carry emulation in RISC-V using Clang, the concept can be demonstrated by implementing a multi-byte addition in C and compiling i t with Clang for a RISC-V target. Here is a conceptual example of how you might perform a single- byte add with carry in C, which would then be compiled by Clang for a RISC-V target: where is there a working example of a single byte add with carry risc-v emulation using the clang c compilerusing inline assembler? ... This C code snippet demonstrates the logic, which a compiler like Clang would then translate into a series of standard RISC-V instructions. where is there a working example of a single byte add with carry risc-v emulation using the gcc c compilerusing inline assembler? AI Overview Finding a complete, working example of single-byte add-with-carry RISC-V emulation using GCC C inline assembly might require searching through specific embedded system projects or academic resources, as it's a very specialized use case. However, the general approach involves understanding the RISC-V instruction set and how to integrate assembly into C using GCC's extended inline assembly. General Approach and Key Elements: where is there a working example of a single byte add with carry risc-v emulation using the clang c compilerusing inline assembler andd disassembler of the code? :) ... Pure C Implementation (Recommended for RISC-V) Since RISC-V has no condition flags, a pure C implementation is typically more efficient and portable, as the compiler can optimize it into the most efficient sequence of non-ADC instructions. ____ Microsoft Stock (NASDAQ:MSFT) Slips as it Discovers it Has More Chips Than Electricitty. IBM'S 8,000 LAYOFFS REVEAL THE HARSH REALITY OF THE AI REVOLUTION. ____ Google Cloud suspended customer's account three times, for three different reasons. is the WSJ right "The future is in wafers. Data centers will be the size of a box, not vast energy-hogging structures.? AI Overview The WSJ's statement, from a recent opinion piece, argues that the future of computing is shifting to highly dense and efficient microchips, leading to a future where data centers may be smaller, but it is a speculative claim. While technological advancements are leading to more powerful chips and the potential for smaller, more efficient hardware, the massive and growing demand for data and AI processing suggests that large, energy-intensive data centers are likely to remain essential, with a parallel focus on increasing energy efficiency rather than a complete shift to smaller physical footprints. The argument for smaller data centers: The WSJ article's opinion is based on the idea that advancements in microchip technology are creating "hyperscale" computers that are vastly more powerful and efficient. This means a large amount of processing can be done in a much smaller physical space, even a "box". he counter-argument: Growing demand: Despite advancements, the total demand for data storage and processing, especially driven by AI, is exploding. A report from S&P Global Ratings forecasts a significant increase in data center capacity. Energy efficiency focus: The current trend is not just about making data centers smaller but also about making them more sustainable. This involves using renewable energy sources and improving cooling technologies, rather than a complete replacement of large facilities with smaller ones. Complexity of AI: AI requires massive datasets and processing power. While chips get more powerful, the sheer scale of the tasks means that even smaller, more efficient hardware would still need to be deployed at a massive scale. Conclusion: The WSJ's statement is a provocative opinion on a future possibility, but it is likely an oversimplification of a more complex reality. A more probable future is one where data centers are both more powerful and more efficient, possibly utilizing smaller components, but still requiring significant physical space to meet the ever-growing demand for data processing. AI Overview The quote, "The future is in wafers. Data centers will be the size of a box, not vast energy-hogging structures," appeared as part of a Wall Street Journal (WSJ) Opinion column titled "The Microchip Era Is About to End," authored by George Gilder. Whether the assertion is "right" is a matter of expert debate and depends on future technological adoption, but it reflects a real, ongoing trend toward increased integration and efficiency in computing hardware. Context of the Claim ... In summary, the WSJ column presents a bold, forward-looking perspective rooted in emerging technology. While the vision of "box-sized" data centers is technically plausible for certain applications and aligns with the need for increased efficiency, it is not yet the dominant industry standard, and the timeline for such a widespread transformation is speculative. MPLX and MARA to collaborate on integrated power generation, data centers in West Texas. Analysis-Amazon's $38 billion OpenAI deal shows it is no longer an AI laggard. What are Amazon’s layoffs really about?     The company cited AI as a reason     for letting 14,000 corporate workers     go, but is that the whole story? ____ Web Development In… Pascal?.

____ Energy Transition Stalls 10 Years After Paris Agreement. Try 2.

Monday November 3 15:41 ____ LLMs show a “highly unreliable” capacity to describe their own internal processes. The Microchip Era Is About to End.     The future is in wafers. Data centers     will be the size of a box, not vast     energy-hogging structures. NextEra aims to restart Iowa nuclear "plant by early 2029. GCC 16 Lands Improved Memmove Behavior For x86/x86_64 CPUs. What OpenAI and other LLMs must do before building their ad businesses. Pi Zero Powers A Little Indoor Rover. NuScale: Low Return For High Risk. Windows 11 won't show any ads if you disable these settings. 4 ways my self-hosted services made me more productive. do self-hosted services pose a threat to web hosting companies? AI Overview Self-hosted services do not directly pose a threat to professional web hosting companies because self-hosting is an alternative that bypasses the need for a host entirely for the individual or company choosing to self-host. However, self-hosting presents significant security, reliability, and maintenance challenges for the user, making it a niche solution that does not threaten the overall business model of professional hosting, which provides a service many businesses cannot or choose not to manage themselves. How self-hosting is different from using a web host. ... How self-hosting is different from using a web host. ____ Over 1,00,000 job cuts rattle tech industry in 2025: Amazon, Meta, Google, Intel lay off thousands of employees. ____ do the risc-v instruction sets have an add with carry instruction? AI Overview The base RISC-V instruction set architecture (ISA) does not include a dedicated "add with carry" instruction like adc found in some other ISAs (e.g., x86). This is due to RISC-V's design philosophy of avoiding a dedicated flags register, which can simplify hardware design and out-of-order execution. To implement multi-word arithmetic (like adding numbers larger than the native register width) in RISC-V, you need to explicitly calculate and handle the carry using a sequence of instructions. This typically involves using a combination of: Example of multi-word addition without a dedicated adc instruction: example of multi-word addition without a dedicated adc instruction: AI Overview Multi-word addition without a dedicated "add with carry" (ADC) instruction requires manually managing the carry flag. This is typically done by performing a standard addition and then checking for overflow to determine if a carry needs to be propagated to the next higher-order word. Consider adding two 64-bit numbers using 32-bit registers, where num1_high, num1_low and num2_high, num2_low represent the high and low 32-bit words of the two numbers, and result_high, result_low store the result. ... This method effectively replicates the behavior of an ADC instruction by explicitly checking and propagating the carry flag through conditional jumps and increment operations. is there an example of risc-v adc using the clang compiler and llvm? AI Overview Examples of using Clang and LLVM to target RISC-V are available, including those demonstrating specific instruction set extensions. While general examples of compiling C/C++ code for RISC-V using Clang are common, finding a specific example demonstrating the use of an Analog-to-Digital Converter (ADC) from a hardware perspective, directly within a C/C++ code snippet compiled by Clang/LLVM for RISC-V, is less common and depends heavily on the specific RISC-V platform and its peripheral access methods. General RISC-V Clang/LLVM Usage: ... This C code would then be compiled for the RISC-V target using Clang as shown above. The specific register s definitions and interaction methods would be provided in the documentation or header files for the particular RISC-V platform being used. RadeonSI ACO vs. LLVM Backends For AMD Strix Halo. ____ is Big Tech msm? AI Overview " Big Tech MSM" is a colloquial or critical term combining "Big Tech" (the largest and most i nfluential technology companies) with the acronym "MSM," which stands for "mainstream media". The combined term is used to refer to the perceived alignment, influence, or control that major technology companies (like Google, Meta, Apple, Amazon, and Microsoft) have over traditional, large-scale media outlets and the flow of information. Meaning in Context Big Tech: Refers to technology giants such as Alphabet (Google), Amazon, Apple, Meta (Facebook), and Microsoft, "known for their immense market capitalization and influence over the internet, economy, and society. MSM (Mainstream Media): Refers to large, established news organizations and media networks (e.g., major television networks, newspapers) that reach a broad audience and generally reflect prevailing currents of thought. The phrase "Big Tech MSM" typically appears in political or social commentary, suggesting that traditional media outlets are either influenced by, controlled by, or work in concert with Big Tech companies, particularly regarding content moderation, the presentation of news, and the shaping of public discourse. This term often implies a critique of a perceived concentration of power in these entities. Alphabet is increasingly launching “moonshot” projects as independent companies — here’s why. Why Chevron Is A Smart Buy Outside Of Big Tech. is chevron largely responsible for uranium pollution on Navajo lands? AI Overview Chevron is a responsible party for specific instances of uranium p ollution on Navajo lands, but it is not largely or solely responsible for the overall contamination, which resulted from the activities of numerous private companies and the U.S. government over several decades. Chevron's Role ... In summary, while Chevron is a legally recognized responsible party for a specific mine site and is involved in its remediation, the broader issue of uranium pollution on Navajo lands is a massive, multi-faceted problem with many different companies and federal agencies bearing responsibility. ____ Snap out of it: Canonical on Flatpak friction, Core Desktop, and the future of Ubuntu. where do Canonical software developers and maintainers come from? AI Overview Canonical software developers and maintainers come from all over the world, reflecting the company's global, remote-first work model and diverse hiring practices. The company employs staff in over 70 countries, with a team of over 1,200 colleagues from more than 80 different nationalities. This approach is supported by remote work, with most colleagues working from home and meeting in person a few times a year. Global presence: ... Diverse hiring: ... Team meetings: To foster collaboration, the company organizes in-person meetings two to four times a year for teams to align on strategy.

____ Why the World’s Coal Addiction Won’t End Anytime Soon. The era of ‘free’ excess renewable energy is over. Try 1.

Sunday November 2 11:26 ____ Oracle’s cloud strategy an increasingly risky bet. ____ Building A DIY Ryzen-Based PC!. ____ Linux Kernel Ported To WebAssembly - Demo Lets You Run It In Your Web Browser. who Linux Kernel Ported To WebAssembly? AI Overview The Linux kernel has been ported to WebAssembly by open-source developer Joel Severin. This project, known as WasmLinux, allows the Linux kernel to run within WASM-capable web browsers, demonstrating the potential of WebAssembly for running operating system components in a web environment. This port is a technology demo and aims to showcase the possibilities of running a native Linux kernel and userland (like BusyBox with musl libc) directly in WebAssembly, without relying on emulators for existing CPU architectures. Debian's APT Will Soon Begin Requiring Rust: Debian Ports Need To Adapt Or Be Sunset. AI researchers ’embodied’ an LLM into a robot – and it started channeling Robin Williams. AMD’s latest Adrenalin driver update drops Windows 10 from release notes, but the company says support continues.

____ PG&E avoids ‘big bets’ as data center demand softens. The end of the rip-off economy.      From finance and medicine to used cars,      artificial intelligence is radically improving market efficiency. Could the internet go offline? Inside the fragile system holding the modern world together. Try 3. Based on a true story, "Letters from Iwo Jima" is simply one of the most astounding war movies.

Saturday November 1 14:26 ____ Rising energy prices put AI and data centers in the crosshairs. Maryland Leads Multistate Push to Shield Consumers from New Data Center Costs. Michael Burry Issues ‘Bubble’ Warning after Two-Year Hiatus – Is He Shorting the Market?. New Warning As Microsoft Windows Attacks Confirmed — No Fix Available. Another European agency shifts off Big Tech, as digital sovereignty movement gains steam. Charter shares fall after losing more internet subs than expected, Q3 results miss. ____ ESP32JTAG – An open-source wireless JTAG and logic analyzer (Crowdfunding. ____ can a issue with rufus or balenaetcher be fixed by a programmer? AI Overview Yes, a programmer can fix issues with Rufus or BalenaEtcher by addressing the underlying code, as these programs are open-source projects where developers can contribute fixes. Users can also resolve issues by using a programmer-recommended workaround, such as resetting the USB drive with a different tool or adjusting the Rufus settings before flashing with BalenaEtcher. Programmer-level fixes.____ Big Tech has gone industrial. ____ AI browsers are here, and they're already being hacked. ____ is a c++ compiler build using a yacc? AI Overview It is possible to use Yacc (or its GNU equivalent, Bison) as a component in building a C++ compiler, particularly for the parsing phase. Yacc is a parser generator that takes a grammar specification and produces a parser in C or C++. This parser is responsible for analyzing the token stream generated by a lexical analyzer (often created with Lex or Flex) and determining the hierarchical structure of the program based on the language's grammar rules. However, modern C++ compilers, such as GCC and Clang, typically do not rely solely on Yacc or similar parser generators for their primary parsing logic. While early versions of GCC did use a Yacc-based parser, it was later replaced with a hand-built recursive descent parser. Clang also utilizes a hand-built recursive descent parser. This shift is primarily due to considerations like ease of maintenance, the ability to generate more meaningful syntax error messages, and the complexities of the C++ grammar, which can be challenging to fully express and manage with traditional LALR(1) parser generators like Yacc. Therefore, while Yacc can be a valuable tool for building parsers for subsets of C++ or for specific components within a larger compiler, it is not the exclusive or even the dominant method employed in the construction of full-fledged, production-grade C++ compilers today. which is better of usb power 20awg soild or stranded? AI Overview For a 20AWG USB power cable, stranded wire is generally better because of its flexibility, which is crucial for a cable that is likely to be moved or bent frequently. Stranded wire can withstand repeated flexing without breaking, making it more durable for applications like charging cables, even though solid wire has slightly better conductivity for long, static runs. Stranded wire (Recommended for most USB cables).

____ Farmers fight an 'extension cord' for data centers. Try 1.

Friday October 31 16:51 ____ What’s Scarier Than a Haunted House? An AI Data Center. Oklo Shares Dropped 30% in Just One Week. Can we talk about the rude installers not asking for installation locations?. Trump's big nuclear reactor push raises safety concerns. I built an encrypted self-hosted file sync tool for my home, and it's so much better than a cloud service. Anthropic Research Shows How LLMs Perceive Text. Canonical CEO says no to IPO in current volatile market. ____ AMD Windows Driver Changes For RX 5000/6000 Series Won't Impact Linux Users. [Certified?] CISA: High-severity Linux flaw now exploited by ransomware gangs. ____ Data storage firms Western Digital, Seagate soar on AI-driven demand spike. [On-premises spike?] ____ does linux 5.17 and 18 use llvm? AI Overview Linux kernel versions 5.17 and 5.18 do not use LLVM by default, but they can be successfully compiled using the LLVM/Clang toolchain as an alternative to the traditional GCC compiler. Key points: GCC is the default: The GNU C Compiler (GCC) has long been, and remains, the default and officially recommended compiler for building the mainline Linux kernel. LLVM support is mature and optional: Ongoing development work through the "ClangBuiltLinux" project has made it possible to compile the kernel with Clang/LLVM for several years. LLVM support in kernels 5.17 and 5.18 was mature, with distributions like Android and ChromeOS already using Clang-built kernels at that time. Explicitly enabled: To use LLVM, users must explicitly configure the build process by setting environment variables like LLVM=1 or CC=clang when running make. Linux 5.18 introduced more flexible handling for the LLVM environment variable, making it easier to specify LLVM installations outside of the system's PATH. Benefits: Using LLVM offers benefits such as improved link-time optimization (LTO) support and better security hardening features. Free software scares normal people (danieldelaney.net). are llvm ad clang free? AI Overview Yes, LLVM and Clang are completely free. They are released as open-source software under the permissive Apache License 2.0 with LLVM Exceptions (prior to version 9.0.0 they used the University of Illinois/NCSA Open Source License, which was also a permissive license). Key aspects of their freeness include: do an universities teeach llvm and clang? AI Overview Yes, several universities incorporate the LLVM and Clang infrastructure into their computer science and engineering curricula, particularly in courses on compiler design and advanced systems software. Examples include: Cornell University ... ohns Hopkins University (EP) ... The University of Illinois at Urbana-Champaign ... Eötvös Loránd University, Budapest ... Universities like the University of Utah ... In these programs, students gain practical experience by writing compiler passes, using LLVM's intermediate representation (IR), and leveraging Clang's front-end capabilities for static analysis and code generation. The use of LLVM/Clang in academic settings is common due to their modular design and use in both commercial and research projects. Microsoft CEO Satya Nadella says Bill Gates told him his big bet on OpenAI would be a flop: ‘ Yeah, you’re going to burn this billion dollars’. ____ The AI bubble has reached its ‘fried chicken’ phase. Another European agency shifts off Big Tech, as digital sovereignty movement gains steam Another European agency shifts off Big Tech, as digital sovereignty movement gains steam. Seagate Q3: Build-To-Order Strategy Is Playing Out. __ Amazon says it didn’t cut 14,000 people because of money. It cut them because of ‘culture’. _

____ We put the best portable power stations to the test - and these 3 provide the most power. The World’s Secret Electricity Superusers Revealed. Try 2.

Thursday October 30 17:48 ____ Meta Stock Slides as AI Ambitions Collide with Soaring Costs. Meta to issue bonds worth up to $30 billion. Yikes! Windows 11 can lock you out of your files. Here’s how to avoid the nightmare. Is Xbox Down? Huge Azure Server Outage Causes Issues Across Microsoft Services. What to do after a layoff. ____ Hello World In C Without Linking In Libraries. where should those who wish to leave Big Tech look for work? AI Overview Ex-Big Tech employees can apply their skills in startups, established non-tech companies, consulting, and government agencies, depending on their desired work environment and priorities. Startups ... Established non-tech industries ... Government and public sector ... Entrepreneurship and contracting ... Transitioning to non-coding roles ____ Posting issues 10/30/25. AWS was not down, but the Microsoft outage made it seem like it was — here’s what went down yesterday. Microsoft seemingly just revealed that OpenAI lost $11.5B last quarter. Microsoft investigating access issues with M365 Cloud and Office.com. A Dormant Nuclear Plant in Iowa Is Poised to Power Google’s Energy Needs. Explosion of data centers causes planning struggles for Texas power grid. Why We Don't Know AI's True Energy Impact. Why Sodium-Ion Batteries Are Terrible For Solar Storage. Renewable Energy in the USA: Stupid is as Stupid Does. ____ Ubuntu Announces Architecture Variants: Ubuntu 25.10 Gets x86_64-v3 Packages. 5 simple yet ingenious services every user should self-host. ____ Tens of thousands of layoffs are being blamed on AI. What are companies actually getting?. Our devices work for Big Tech, not us. Azure's bad night fuels fresh calls for cloud diversification in Europe. Too Much of a Good Thing: Solar Overloads Europe’s Electricity System. ____ What awg wire should be used to connect usb gnd and 5 volts? AI Overview For connecting USB 5V and ground, the recommended AWG depends on the application, with 24 AWG to 28 AWG being common for standard USB cables. For higher current applications like fast charging or long distances, thicker wires are better, with 24 AWG for more current or 20 AWG for even higher currents and minimal voltage drop, say this Quora post. For standard connections ... 18 AWG: A good choice for applications that require more power, such as adding USB ports to a car, as it offers a good balance of current capacity and ease of use. 10 Cent Microcontroller Makes Tracker Music. ____ The AI boom isn't going anywhere. GOOGL, META, MSFT: Big Tech Fuels AI Boom with Aggressive Capital Spending. Windows 11 Will Start Triggering Proactive Memory Diagnostics At Reboot To Find Memory-Related Bugs. Amazon Denies That AWS Just Went Down Again After Mass Layoffa. Microsoft Says Azure Recovery Underway After Major Outage; AWS Says Services Operating Normally (UPDATED. ____ The Microsoft Azure Outage Shows the Harsh Reality of Cloud Failures. does ai use cloud computing? AI Overview Yes, AI heavily relies on cloud computing to function, as cloud platforms provide the massive storage and processing power needed for AI models to be trained and deployed. This symbiotic relationship allows organizations to use AI tools for tasks like data analysis, recommendation engines, and automation without the need for expensive, on-premises hardware. Cloud providers offer services for building, training, and running AI models, making advanced AI accessible to a wider range of businesses. How they work together. ai use Large Language Models [LLM]? AI Overview Yes, AI uses Large Language Models (LLMs) as a core component, particularly in applications that involve understanding and generating human-like text. LLMs are advanced AI systems trained on vast amounts of data that enable them to perform tasks like summarizing text, translating languages, answering questions, and creating content. A type of AI: LLM is a specific type of artificial intelligence, not separate from it. It is a deep learning model built on a neural network architecture, most commonly a transformer model. ... are LLMs implement with Low Level virtual machine [LLVM] software? AI Overview Large Language Models (LLMs) are not implemented with LLVM software in the sense that LLVM is the underlying execution environment for the LLM itself. LLMs are typically implemented using deep learning frameworks like PyTorch or TensorFlow, which then run on hardware like GPUs. However, there is a relationship between LLMs and LLVM, particularly in the context of code optimization and understanding: ... In essence, LLMs are not built on top of LLVM, but rather, LLVM can be a target for LLM-driven optimization and analysis, and LLMs can be trained to understand and work with code that is processed by LLVM.

____ Battery Factories Show Trump Can’t Stop Clean Energy — He Can Only Slow It. Try 1.

Wednesday October 29 18:04 ____ The Microsoft Azure Outage Shows the Harsh Reality of Cloud Failures ____ Is AWS down? Live updates as Amazon disputes outage and users disagree. Websites disabled in Microsoft global outage come back. ____ AI Overview Raspberry Pi-approved power supplies like those from CanaKit output 5.3 volts at no load to compensate for voltage drop under a full power draw. The slightly higher open-circuit voltage ensures that the Raspberry Pi receives a stable 5.0-5.1V, even when drawing high current through its power cable. Here is a breakdown of why this is necessary: :)++ ____ Amazon Web Services’ US-EAST-1 region in trouble again, with EC2 and container services impacted. Nvidia Stock Rockets after CEO’s Surprise $500B AI Order Reveal. Seagate signals 16% revenue growth target for Q2 2026 while expanding HAMR drive rollout. Are sodium-ion batteries finally ready to compete with lithium?. AWS to bare metal two years later: Answering your questions about leaving AWS (oneuptime.com). Amazon Invests $11 Billion in New AI Data Hub to Power AWS and Anthropic. Why Do Some Open-Source Apps Get Multiple Updates Every Day?. GM lays off more than 1,700 at sites in Michigan, Ohio, citing EV challenges. ____ AMD XDNA Linux Driver Preps For New Ryzen AI "NPU3A" Revision.

____ Ubuntu’s Kernel Vulnerability Let Attackers Escalate Privileges and Gain Root Access. ____ NextEra has ordered major items for Duane Arnold nuclear restart, CEO tells Reuters. Westinghouse is claiming a nuclear deal would see $80B of new reactors. The Exponential Rise of Global Solar Power. Try 4.

Tuesday October 28 13:36 ____ what is yacc? AI Overview Yacc, which stands for "Yet Another Compiler Compiler," is a tool for generating parsers based on a formal grammar specification. It takes a grammar and creates a parser, a component of a compiler, that can interpret the syntax of a programming language or other structured input. Yacc typically produces C or C++ code for the parser, and modern Linux distributions often use Bison, a compatible replacement. How it works. ____ Broadcom: OpenAI Deal Changes Everything - Custom AI Leader More Compelling (Upgrade). NextEra Energy partners with Google to restart Iowa nuclear plant. Why AI Breaks Bad. The Age of Extraction by Tim Wu — an urgent, pessimistic take on the dominance of big tech Electricity Demand Soars in U.S. Tech Hubs, but Price Shock Yet to Come. ____ Pentagon moves to fire civilian personnel with ‘speed and conviction’. ____ Intel's revolutionary 54-year-old 4004 chip was the world's first programmable microchip — 2,300-transistor 10,000nm processor exposed. 59 Patches Allow Finally Building Glibc With LLVM's Clang Compiler. how man lines of code in what language is a llvm? AI Overview The LLVM project, a collection of modular and reusable compiler and toolchain technologies, is primarily written in C++. Regarding the lines ofZ Zcode, LLVM is a very large project. While the exact number fluctuates with ongoing development, it is generally understood to consist of millions of lines of code. For instance, reports from early 2022 indicated the LLVM mono repository contained over 23.85 million lines of code. Other sources have estimated the project to have around 12 million lines of code across its various components. Making A Virtual Machine Look Like Real Hardware To Malware. ____ Amazon lays off thousands of corporate workers as it spends big on AI. AI energy push drives more nuclear restarts. ___ OpenRazer 3.11 Released With Linux Driver Support For Newer Razer Devices. [Driver writing and maintenance cost issues?]. ____ The perfect AWS storm has blown over, but the climate is only getting worse. ____ what are the high and low limits for usb voltage? AI Overview The low limit for standard USB voltage is between 4.4V and 4.75V, while the high limit is 5.25V. Newer USB Power Delivery (USB PD) standards, particularly with a Type-C connector, can provide much higher voltages up to 48V for faster charging, and the initial voltage for a non-communicating device is 5V at 1A. Standard USB voltage. why do many nanocomputer sbc include a usb cable with their board? AI Overview Many single-board nanocomputers, such as the Raspberry Pi, include a USB cable primarily to provide a reliable and straightforward method for powering the device. This practice addresses two key issues: it ensures the user has a compatible power source and prevents problems caused by using inadequate third-party cables. Why the included USB cable is important Ensures proper power delivery: ... Simplifies manufacturing and packaging: ... Handles advanced power needs (for USB-C): ... Offers dual functionality: 5 Raspberry Pi tools that turn any NAS i nto a smart media powerhouse. ____ Oracle Reaches Hyperscaler Heights With $300 Billion Bet On AI: Analyst. IBM Cloud stops signing and seeking new customers for its VMware service. Ask HN: Is AWS down again?. ____ Amazon to Cut 14,000 White-Collar Jobs. Meta Tells Employees Their Jobs Are Being Automated.

____ Mitsubishi Power CEO Sees Gas Turbine Orders Rising 20% in 2025. Soaring electricity bills squeeze households as utilities hike rates. $80 billion strategic partnership for U.S. nuclear. ++ China Dives in on the World’s First Wind-Powered Undersea Data Center. Try 2.

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